Machine Instruction for Load Word

Here is the machine code version of the instruction. It specifies the base register, the destination register, and the offset. It does not directly contain the memory address.

Here is how this instruction is executed. Say that register $10 already contains address 0x00400000.

1. The 32-bit address in $10 is:   0x00400000
2. The offset is sign-extended to 32 bits:   0x00000060
3. The memory address is the 32-bit sum of the above:   0x00400060
4. Main memory is asked for data from that address.
5. After a one machine cycle delay the data reaches $8.   $8 = the 4 bytes starting at 0x00400060

There is a one machine cycle delay before the data from memory is available. Reaching outside of the processor chip into main memory takes time. But the processor does not wait and executes one more instruction while the load is going on.

This is the load delay slot. The instruction immediately after a lw instruction should not use the register that is being loaded. Sometimes the instruction after the lw is a no-operation instruction.