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11111 111
 1010 1011
 0101 0101
 0000 0000

Does overflow happen for:

The addu Instruction

The addu instruction performs the Binary Addition Algorithm on the contents of two 32-bit registers and places the result in the destination register. The destination register can be the same as one of the source registers. The addu instruction mechanically grinds through the Binary Addition Algorithm, producing a 32-bit result from two 32-bit operands. Overflow is ignored (that is what the "u" at then end of the mnemonic means).

addu  d,s,t        # d <—— s + t
                   # no overflow trap

There is another instruction, add, which causes a trap when two's complement overflow is detected. Other than that, it is the same as addu. A trap is an interruption in the normal machine cycle. Typically on a computer system a trap results in sending control back to the operating system.

add   d,s,t        # d <—— s + t
                   # with overflow trap

Most assembly programmers deal with overflow by making sure that the operands won't cause it. Usually they use the addu instruction. Until you know how to handle a trap that is the approach we will take.


What is the range of integers that can be represented with 32-bit two's complement?

-2—— to +2—— -1

(Pick an exponent for each "2").