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  + 01  

This is another case where the answer fits into the same number of bits as the numbers to add.

Details, Details

Here are some details:

  1. Usually the operands and the result have a fixed number of bits (usually 8, 16, 32, or 64). These are the sizes that processors use to represent integers.

  2. To keep the result the same size as the operands, you may have to include zero bits in some of the leftmost columns.

  3. Compute the carry-out of the leftmost column, but don't write it as part of the answer (because there is no room if you have a fixed number of bits.)

  4. When the operands are represented using the unsigned binary scheme (the base two representation scheme discussed in the last two chapters) a carry-out of  1  from the leftmost column means the sum does not fit into the fixed number of bits. This is called Overflow.

  5. When the operands are represented using the two's complement scheme (which will be described at the end of this chapter), then a carry-out of  1  from the leftmost column is not necessarily overflow.

Integers may be represented using a scheme called unsigned binary or using a scheme called two's complement binary. The binary addition algorithm is used with both schemes, but to interpret the result you need to know what scheme is being used. Overflow is detected in different ways with each scheme (see details 4 and 5, above.)


The MIPS32 chip has 32-bit registers. What do you think is the usual size of the operands when binary addition is performed?